[Computer Architecture] Architecture and Microarchitecture

Computation Stack

  • Application: making cars to drive itself requiring different algorithms
  • Programming Languages: express the algorithms, virtual entity
  • Operating Systems / Compiler

Semantic Gap between virtual and physical world

  • Architecture: Machine code, you have no idea about how… “WHAT”
  • Microarchitecture: Specific composition of circuits… “HOW”
  • Circuits
  • Transistors (devices in ECE): voltage controlled 2D switch with ON/OFF
  • Atoms

* Execution requires physical substrate
* OS and Compilers work in tandem, intertwined

Architecture and Microarchitecture

Architecture and Microarchitecture are what bridges the semantic gap between Operating Systems/Compiler and Circuits of the computation stack. Architecture defines “what” to accomplish, and Microarchitecture defines “how” to accomplish it.

Architecture could be an Instruction Set Architecture (ISA) where it defines “what” a processor can do or canonical set of capability. Microarchitecture could be a specific composition of circuits, where it defines “how” operations/capabilities defined in Architecture can be accomplished.

“How” is not defined in the Architecture to provide abstraction, so that we don’t have to build a new compiler every time we develop a new processor and so that we don’t need to recompile the code for new circuits.

Top-down: Facebook, translates to machine codes (bunch of instructions)
Bottom-up: Capabilities in the hardware that are canonical (like orthogonal functions)

Machine model

Von Neumann’s model
– CPU: PC, ALU, Control Unit
– Memory: including both Data and Instructions

Harvard model
– CPU
– Instruction Memory + Data Memory

Modern processors
– CPU
– Instruction Cache + Data Cache
– Last Level Cache (LLC) to back them up
– Memory: including both Data and Instructions

Memory

Memory is so slow that small temporary storage to do operations close by.
– Registers: small namespace that lets us do operations on the data.
– Cache: on-chip and NOT a namespace, because you cannot address to it
– Scratchpad: on-chip memory that is visible/available to the software. A namespace, because you can address to it
– Memory: off-chip and is a namespace, because you can address to it

* With registers, you encode names in code. With SPM, (much bigger) you cannot encode names so go through the same mechanism as off-chip memory

Type of Instruction Set Architecture

  • Operands
    • Register-Register, Load-store (: ex. ARM):
    • Register-Memory (ex. Intel/AMD):
    • Accumulator: one of the operands act as the accumulator
    • Stack (ex. JVM): push and pop
    • Dataflow (ex. LLVM): No registers but with unique destination for every instructions
  • Addressing modes
    • Immediate: #25
    • Register indirect: M[R3]
    • Displacement: M[R3 + 10000]
  • Operations
    • Arithemetic: Add, Subtract, Multiply, Divide
    • Logical: AND, OR, Shift left, Shift right
    • Data transfer: Load word, Store word
    • Control flow: Conditional branch, Jump, Procedure call/return
  • Branch method
    • Side-effect: condition codes
    • No side-effect: condition register, compare and branch
  • Instruction format
    • Fixed size
    • Variable size: Intel

* To reduce complexity, follow what compiler will find easier: regularity, primitives
* Static Single Assignment: Static (Compile time), Single Assignment (Uniqueness)
* Register allocation: take infinite number of operands (or the edges) and assign it to real registers.

MIPS ISA

Designed after making various trade-off between various options given above
– Load-store
– Addressing modes: Immediate, Register indirect, Displacement
– Reasonable number of operations (primitives)
– No condition codes
– Fixed instruction encoding (regularity)

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